CMOS ADVANTAGES OVER CCD
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Standard
Fabrication Lowers Costs and Enables On-Chip Integration
CCD
sensors rely on specialized fabrication that requires
dedicated—and costly—manufacturing processes. In contrast,
CMOS image sensors can be made at standard manufacturing
facilities that produce 90% of all semiconductor chips, from
powerful microprocessors to RAM and ROM memory chips. This
standardization results in economies of scale and leads to
ongoing process-line improvements. CMOS processes, moreover,
enable very large scale integration (VLSI), and this is used by
Photobit’s “active-pixel” architectures to incorporate all
necessary camera functions onto one chip. Such integration
creates a compact camera system that is more reliable and
obviates the need for peripheral support chip packaging and
assembly, further reducing cost.
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Low
Power Usage Extends Battery Life
Active-pixel
sensor architectures consume much less power—up to 100x less
power—than their CCD counterparts. This is a great advantage
in battery-dependent portable applications, such as laptop
computers, hand-held scanners, and video cellphones. CCD
systems, on the other hand, tend to be inherently power hungry.
This is because CCDs are essentially capacitive devices, needing
external control signals and large clock swings (5–15 volts)
to achieve acceptable charge transfer efficiencies. Their
off-chip support circuitry dissipates significant power. CCD
systems require numerous power supplies and voltage regulators
for operation, whereas active-pixel sensors use a single 5-volt
(or 3.3-volt) supply, reducing power-supply inefficiency. A CCD
system typically requires 2–5 watts (digital output), compared
to 20–50 milliwatts for the same pixel throughput using an
active-pixel system.
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Random
Access to Regions of Interest Adds Flexibility
In
CMOS active-pixel image sensors, both the photodetector and the
readout amplifier are part of each pixel. This allows the
integrated charge to be converted into a voltage inside the
pixel, which can then be read out over X-Y wires (instead of
using a charge domain shift register, as in CCDs). This column
and row addressability, similar to common DRAM, allows for
window-of-interest readout (windowing), which can be utilized
for on-chip electronic pan, tilt, and zoom. Windowing provides
much added flexibility in applications that need image
compression, motion detection, or target tracking.
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No
Artifacts, Smear, or Blooming Means Higher-Quality Images
With
Photobit active-pixel architectures, the RMS input-referred
noise is comparable to the very high-end (and expensive) CCDs.
Both technologies provide excellent imagery compared with other
CMOS image sensors. Photobit active-pixel architectures use
intra-pixel amplification in conjunction with both temporal and
fixed-pattern noise suppression circuitry (i.e., correlated
double sampling), which produces exceptional imagery in terms of
dynamic range (a wide ~75 dB) and noise (a low ~15 e-RMS noise
floor), with low fixed-pattern noise (<0.15% sat). Photobit
active-pixel sensors achieve a quantum efficiency (sensitivity)
that is comparable to high-end CCDs, but, unlike CCDs, they are
not prone to column streaking due to blooming pixels. This is
because CCDs rely on charge domain shift registers that can leak
charge to adjacent pixels when the CCD register overflows,
causing bright lights to "bloom" and leading to
unwanted streaks in the image. In Photobit active-pixel
architectures, the signal charge is converted to a voltage
inside the pixel and read out over the column bus, as in a DRAM.
Photobit sensors have built-in anti-blooming protection in each
pixel, so that there is no blooming. Smear, caused by charge
transfer in a CCD under illumination, is also avoided.
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IFaster
Frame Rates
CMOS
active-pixel designs are inherently fast, which is an advantage
in machine-vision and motion-analysis applications particularly.
Active pixels can drive an image array’s column buses at
greater speeds than is possible on passive-pixel CMOS sensors or
CCDs, and on-chip analog-to-digital conversion (ADC) eases the
driving of high-speed signals off-chip. (Photobit supplies the
world’s fastest image sensor, the PB-1024,
which runs at over 500 frames per second at megapixel
resolution. This chip’s design allows it to sub-sample rows in
the array to achieve even faster speeds. With a 66-megahertz
clock, for example, a row time is 2 microseconds, which yields a
frame rate of 1,953 fps when 256 rows are sampled or 50,000 fps
when 10 rows are sampled.) A separate benefit of on-chip ADCs is
the output signal’s low sensitivity to pick-up or crosstalk.
This facilitates computer and digital-controller interfacing
while adding to system robustness.
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On-Chip
Integrated Circuitry Enables “Smart” Camera Functions
CMOS
active-pixel architectures allow signal processing to be
integrated on-chip. Beyond the standard camera functions—AGC,
auto-exposure control, etc.—many higher-level DSP functions
can be realized. These include anti-jitter (image stabilization)
for camcorders, image compression (before and after readout),
color encoding, computer databus interface circuits,
multi-resolution imaging, motion tracking for perimeter
surveillance (“smart image sensing”), video conferencing,
and wireless control.
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